PIC18F4610T-I/ML【PDF 141/234 页】IC MCU FLASH 32KX16 44QFN

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Sheet目录3878

137页 138页 139页 140页 [141页]142页 143页 144页 145页

2003 Microchip Technology Inc.

DS39582B-page 223

PIC16F87XA

I/O Ports ............................................................................. 41

I2C Bus Data Requirements ............................................ 192

I2C Bus Start/Stop Bits Requirements ............................. 191

I2C Mode

Registers .................................................................... 80

I2C Mode ............................................................................ 80

ACK Pulse ............................................................ 84, 85

Acknowledge Sequence Timing ............................... 104

Baud Rate Generator ................................................. 97

Bus Collision

Repeated Start Condition ................................. 108

Start Condition ................................................. 106

Stop Condition ................................................. 109

Clock Arbitration ......................................................... 98

Effect of a Reset ...................................................... 105

General Call Address Support ................................... 94

Master Mode .............................................................. 95

Operation ........................................................... 96

Repeated Start Timing ..................................... 100

Master Mode Reception ........................................... 101

Master Mode Start Condition ..................................... 99

Master Mode Transmission ...................................... 101

Multi-Master Communication, Bus Collision

and Arbitration .................................................. 105

Multi-Master Mode ................................................... 105

Read/Write Bit Information (R/W Bit) ................... 84, 85

Serial Clock (RC3/SCK/SCL) ..................................... 85

Slave Mode ................................................................ 84

Addressing ......................................................... 84

Reception ........................................................... 85

Transmission ...................................................... 85

Sleep Operation ....................................................... 105

Stop Condition Timing .............................................. 104

ID Locations ............................................................. 143, 157

In-Circuit Debugger .................................................. 143, 157

Resources ................................................................ 157

In-Circuit Serial Programming (ICSP) ...................... 143, 158

INDF Register .........................................................19, 20, 31

Indirect Addressing ............................................................ 31

FSR Register ............................................................. 16

Instruction Format ............................................................ 159

Instruction Set .................................................................. 159

ADDLW .................................................................... 161

ADDWF .................................................................... 161

ANDLW .................................................................... 161

ANDWF .................................................................... 161

BCF .......................................................................... 161

BSF .......................................................................... 161

BTFSC ..................................................................... 161

BTFSS ..................................................................... 161

CALL ........................................................................ 162

CLRF ........................................................................ 162

CLRW ...................................................................... 162

CLRWDT .................................................................. 162

COMF ...................................................................... 162

DECF ....................................................................... 162

DECFSZ ................................................................... 163

GOTO ...................................................................... 163

INCF ......................................................................... 163

INCFSZ .................................................................... 163

IORLW ..................................................................... 163

IORWF ..................................................................... 163

RETURN .................................................................. 164

RLF .......................................................................... 164

RRF ......................................................................... 164

SLEEP ..................................................................... 164

SUBLW .................................................................... 164

SUBWF .................................................................... 164

SWAPF .................................................................... 165

XORLW ................................................................... 165

XORWF ................................................................... 165

Summary Table ....................................................... 160

INT Interrupt (RB0/INT). See Interrupt Sources.

INTCON Register ............................................................... 24

GIE Bit ....................................................................... 24

INTE Bit ..................................................................... 24

INTF Bit ..................................................................... 24

PEIE Bit ..................................................................... 24

RBIE Bit ..................................................................... 24

RBIF Bit ................................................................24, 44

TMR0IE Bit ................................................................ 24

TMR0IF Bit ................................................................. 24

Inter-Integrated Circuit. See I2C.

Internal Reference Signal ................................................ 137

Internal Sampling Switch (Rss) Impedance ..................... 130

Interrupt Sources ......................................................143, 153

Interrupt-on-Change (RB7:RB4) ................................ 44

RB0/INT Pin, External ..................................... 9, 11, 154

TMR0 Overflow ........................................................ 154

USART Receive/Transmit Complete ....................... 111

Interrupts

Bus Collision Interrupt ................................................ 28

Synchronous Serial Port Interrupt .............................. 26

Interrupts, Context Saving During .................................... 154

Interrupts, Enable Bits

Global Interrupt Enable (GIE Bit) ........................24, 153

Interrupt-on-Change (RB7:RB4)

Enable (RBIE Bit) .......................................24, 154

Peripheral Interrupt Enable (PEIE Bit) ....................... 24

RB0/INT Enable (INTE Bit) ........................................ 24

TMR0 Overflow Enable (TMR0IE Bit) ........................ 24

Interrupts, Flag Bits

Interrupt-on-Change (RB7:RB4) Flag

(RBIF Bit) .............................................. 24, 44, 154

RB0/INT Flag (INTF Bit) ............................................ 24

TMR0 Overflow Flag (TMR0IF Bit) .....................24, 154

Loading of PC .................................................................... 30

Low-Voltage ICSP Programming ..................................... 158

Low-Voltage In-Circuit Serial Programming ..................... 143

Master Clear (MCLR) ........................................................... 8

MCLR Reset, Normal Operation ............... 147, 149, 150

MCLR Reset, Sleep .................................. 147, 149, 150

Master Synchronous Serial Port (MSSP). See MSSP.

MCLR ............................................................................... 148

MCLR/VPP ......................................................................... 10

Memory Organization ........................................................ 15

Data EEPROM Memory ............................................. 33

Data Memory ............................................................. 16

Flash Program Memory ............................................. 33

Program Memory ....................................................... 15

MPLAB ASM30 Assembler, Linker, Librarian .................. 168

MPLAB ICD 2 In-Circuit Debugger .................................. 169

MPLAB ICE 2000 High-Performance Universal

In-Circuit Emulator ................................................... 169

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